1. Field of the Invention
The present invention relates generally to flat panel displays (FPDs), and more specifically to field emission displays (FEDs). Even more specifically, the present invention relates to the structural design of field emission displays (FEDs).
2. Discussion of the Related Art
A field emission display (FED) is a low power, flat cathode ray tube type display that uses a matrix-addressed cold cathode to produce light from a screen coated with phosphor materials. FIG. 1 is a side cut-away view of a conventional FED. The FED 100 includes a cathode plate 102 and an anode plate 104, which opposes the cathode plate 102. The cathode plate 102 includes a cathode substrate 106, a first dielectric layer 108 disposed on the cathode substrate 106 and several emitter wells 110. Within each emitter well 110 is an electron emitter 112. Thus, the electron emitters are formed as conical electron emitters, the shape of which aids in the removal of electrons from the tips of the electron emitters 112. Each electron emitter 112 is generally referred to as a cathode sub-pixel. The cathode plate 102 also includes a gate electrode 114 integral with the cathode substrate 106 and disposed on the first dielectric layer 108 and circumscribing each emitter well 110. In order to precisely align the gate electrode 114 with the electron emitters 112, the emitter wells 110 are formed by cutting them out of the first dielectric layer 108 and the gate electrode 114 as formed on the cathode substrate 106 and then placing the electron emitters 112 within the emitter wells 110. As such, the manufacture of the cathode plate 102 is difficult and expensive.
The anode plate 104 includes a transparent substrate 116 upon which is formed an anode 118. Various phosphors are formed on the anode 118 and oppose the respective electron emitters 112, for example, a red phosphor 120, a green phosphor 122 and a blue phosphor 124, each phosphor generally referred to as an anode sub-pixel.
The FED 100 operates by selectively applying a voltage potential between cathodes of the cathode substrate 106 and the gate electrode 114, which causes selective emission from electron emitters 112. The emitted electrons are accelerated toward and illuminate respective phosphors of the anode 118 by applying a proper potential to a portion of the anode 118 containing the selected phosphor. It is noted that one or more electron emitters may emit electrons at a single phosphor.
Additionally, in order to allow free flow of electrons from the cathode plate 102 to the phosphors and to prevent chemical contamination (e.g., oxidation of the electron emitters), the cathode plate 102 and the anode plate 104 are sealed within a vacuum. As such, depending upon the dimensions of the FED, e.g., structurally rigid spacers (not shown) are positioned between the cathode plate 102 and the anode plate 104 in order to withstand the vacuum pressure over the area of the FED device.
In another conventional FED design illustrated in FIG. 2, an FED 200 further includes a second dielectric layer 202 disposed upon the gate electrode 114 and a focusing electrode 204 disposed upon the second dielectric layer 202. In operation, a potential is also applied to the focusing electrode 204. This potential is selected to collimate the electron beam emitted from respective electron emitters 112. Thus, the focusing electrode 204 concentrates the electrons to better illuminate a single phosphor, i.e., the emitted electrons are focused. However, in order to reduce the spread of electrons, a separate focusing structure (i.e., focusing electrode 204) formed over the gate electrode 114 and that is integral to the cathode substrate 106 is required.
FIG. 3 illustrates a cut-away perspective view of the conventional FED 100 of FIG. 1. As shown, the gate electrode 114 and the first dielectric layer 108 form a grid in which the generally circular-shaped emitter wells 110 are formed. In fabrication, the first dielectric layer 108 and the gate electrode 114 are formed over the cathode substrate 106. The emitter wells 110 are formed by etching or cutting out the first dielectric layer 108 and the gate electrode 114. The conical-shaped electron emitters 112 are then deposited into the emitter well 110.
Advantageously, the conventional FED provides a relatively thin display device that can achieve CRT-like performance. However, the conventional FED is limited by the pixelation of the device. For example, since there are a fixed number of electron emitters 112 and phosphors aligned therewith, the resolution of the conventional FED is fixed. Furthermore, the manufacture of conventional FEDs has proven difficult and expensive. Additionally, while driving the conventional FED, i.e., applying the proper potential between the gate electrode and the electron emitters 112, cross-talk is a common problem.
The present invention advantageously addresses the needs above as well as other needs by providing methods of achieving variable resolution using a field emission display (FED) having a novel structural design.
In one embodiment, the invention can be characterized as a method of achieving a variable resolution on a field emission display and a means for accomplishing the method, the method comprising the step of: addressing a cathode half-pixel region of an emitter line of the field emission display, wherein the emitter line is segmented into a fixed number of cathode sub-pixel regions, each cathode sub-pixel region being defined as a portion of the emitter line between two adjacent gate wires of a plurality of gate wires of a gate frame that pass above the emitter line, wherein the cathode half-pixel region is defined as a portion of the emitter line occupying portions of two adjacent cathode sub-pixel regions, wherein providing the appearance of more than the fixed number of cathode sub-pixel regions.
In another embodiment, the invention can be characterized as a method of achieving a variable resolution on a field emission display and a means for accomplishing the method, the method comprising the step of: addressing at least one cathode half-pixel region of a plurality of emitter lines of the field emission display, wherein each emitter line is segmented into a fixed number of cathode sub-pixel regions, each cathode sub-pixel region being defined as a portion of the emitter line between two adjacent gate wires of a plurality of gate wires of a gate frame that pass above the plurality of emitter lines, wherein each of the at least one cathode half-pixel region is defined as a portion of the emitter line occupying portions of two adjacent cathode sub-pixel regions, wherein providing the appearance of more than the fixed number of cathode sub-pixel regions.
In a further embodiment, the invention may be characterized as a method of achieving a variable resolution on a field emission display comprising the steps of: addressing a cathode half-pixel region of an emitter line of the field emission display, the addressing comprising: applying a positive voltage to a respective gate wire of a plurality of gate wires of a gate frame with respect to the emitter line; and applying a negative voltage to two gate wires adjacent to the respective gate wire with respect to the emitter line, wherein releasing electrons from the cathode half-pixel region of the emitter line; wherein the emitter line is segmented into a fixed number of cathode sub-pixel regions, each cathode sub-pixel region being defined as a portion of the emitter line between two adjacent gate wires of a plurality of gate wires of a gate frame that pass above the emitter line, wherein the cathode half-pixel region is defined as a portion of the emitter line occupying portions of two adjacent cathode sub-pixel regions, wherein providing the appearance of more than the fixed number of cathode sub-pixel regions; and illuminating an anode half-pixel region of a phosphor line of the field emission display corresponding to the cathode half-pixel region of the emitter line, wherein the phosphor line is segmented into a fixed number of anode sub-pixel regions, each anode sub-pixel region being defined as a portion of the phosphor line corresponding to a respective cathode sub-pixel region, wherein the anode half-pixel region is defined as a portion of the phosphor line occupying portions of two adjacent anode sub-pixel regions, wherein providing the appearance of an additional anode sub-pixel region in between the two adjacent anode sub-pixel regions.
In yet another embodiment, the invention may be characterized as a method of achieving a variable resolution on a field emission display comprising the steps of: defining a first resolution of the field emission display based upon a fixed number of cathode sub-pixel regions of a fixed number of emitter lines of a cathode substrate of the field emission display; defining a respective cathode sub-pixel region as a portion of a respective emitter line below and in between two adjacent gate wires passing over the respective emitter line; defining a second resolution of the field emission display based upon the fixed number of the cathode sub-pixel regions and a plurality of cathode half-pixel regions of the fixed number of the emitter lines of the cathode substrate of the field emission display; and defining a respective cathode half-pixel region as a portion of the respective emitter line occupying a portion of two adjacent cathode sub-pixel regions and appearing as being in between the two adjacent cathode sub-pixel regions.
In a further embodiment, the invention can be characterized as a method of achieving a variable resolution on a field emission display comprising the step of: addressing one or more of a plurality of cathode sub-pixel regions of an emitter line of the field emission display, wherein the emitter line is segmented into the plurality of cathode sub-pixel regions; causing an electron emission from the one or more of the plurality of cathode sub-pixel regions; illuminating one or more of a plurality of anode sub-pixel regions of a phosphor line of the field emission display, wherein the phosphor line is segmented into the plurality of anode sub-pixel regions, wherein a first resolution is defined based upon the plurality of anode sub-pixel regions; addressing one or more of a plurality of cathode half-pixel regions of the emitter line of the field emission display, wherein respective ones of the plurality of cathode half-pixel regions occupy portions of respective pairs of the plurality of cathode sub-pixel regions and appear to be in between the respective pairs of the plurality of cathode sub-pixel regions; causing an electron emission from the one or more of the plurality of cathode half-pixel regions; and illuminating one or more of a plurality of anode half-pixel regions of the phosphor line of the field emission display, wherein respective ones of the plurality of anode half-pixel regions occupy portions of respective pairs of the plurality of anode sub-pixel regions and appear to be in between the respective pairs of the plurality of anode sub-pixel regions, wherein a second resolution is defined based upon the plurality of anode sub-pixel regions and the plurality of anode half-pixel regions